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高级信号完整性工程师

机器翻译
查看雇主原标题Senior Signal Integrity Engineer

Graphcore · Austin, Texas, 美国 · salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits inc

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发现指数 52/100,仅依据与该职位一起存储的证据计算。

52/100 发现指数
  • 新的雇主官方职位
  • 稀有职位匹配

分数构成

  • 时效性 (随职位发布时间变化)+18
  • 雇主官方来源+15
  • 稀有职位+11
  • 公司来源健康度+8

该职位未包含:已披露薪资、远程职位、提及签证担保、提及搬迁、未出现在监控的职位板上。

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职位描述

英文原文

该职位由雇主以英文发布,暂无中文版本,下面完整显示英文原文。 查看官方职位页面.

职位描述

1671

岗位职责

We are seeking a Senior Signal Integrity Engineer to develop, validate, and optimize high-speed signaling solutions across blade- and rack-level architectures for advanced compute platforms. This role sits at the intersection of silicon, package, interconnect, board, and system design , with a strong emphasis on hands-on measurement, simulation correlation, and cross-functional technical communication.

• End-to-end signal integrity analysis for blade- and rack-level system architectures.

• Analyze and optimize high-speed and low-speed I/O interfaces, including PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI , I2C, etc . and related interconnects.

• Perform time-domain and frequency-domain simulations using tools such as Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE , or similar.

• Support hands-on lab validation using VNA, TDR, BERT, and high-speed oscilloscopes .

• Correlate simulation results with lab measurements to identify margin gaps, debug issues, and improve design methodology.

• Collaborate with silicon, package, board, connector, cable, and system design teams to optimize I/O channel performance.

• Work with interconnect vendors and ODMs to guide board layout, stack-ups, routing rules, and system design decisions.

• Review schematics, layouts, simulation results, and validation data for blade, backplane, and rack-level hardware.

• Prepare and communicate clear validation reports, measurement summaries, debug findings, and technical recommendations to internal teams, vendors, and senior technical stakeholders.

Required Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or a related field .

• Strong experience in signal integrity for high-speed digital systems.

• Hands-on measurement expertise using VNAs, TDRs, BERTs, and high-speed oscilloscopes .

• Experience measuring and analyzing S-parameters, impedance profiles, eye diagrams, jitter, timing margins, insertion loss, return loss, and crosstalk .

• Knowledge of high-speed interfaces such as PCIe Gen4/5/6, Ethernet, DDR, SerDes , and related I/O technologies.

• Experience with SI/PI simulation tools such as HFSS, ADS, Sigrity, CST, SPICE , or equivalent.

• Ability to correlate lab measurements with simulations and use data to guide design decisions.

• Strong communication skills, including the ability to produce clear validation reports, present technical findings, and work effectively across multi-functional engineering teams.

任职要求

• Experience in hyperscale, data center, cloud infrastructure, or advanced compute hardware environments .

• Experience with blade, backplane, board-to-board, cable, or rack-level interconnect architectures.

• Knowledge of thermal and mechanical considerations that impact SI/PI performance.

• Experience with calibration, de-embedding, fixture design, lab automation, or measurement methodology development.

• Experience using Python, MATLAB , or similar scripting languages for simulation automation, measurement automation, and data analysis.

Tools / Technologies

Measurement: VNA, TDR, BERT, high-speed oscilloscopes Simulation: Ansys HFSS, Keysight ADS, Cadence Sigrity, CST, SPICE Interfaces: PCIe Gen4/5/6, Ethernet, DDR, SerDes, SPI, high-speed interconnects Analysis: S-parameters, eye diagrams, jitter, timing margins, impedance control, crosstalk, insertion loss, return loss, de-embedding, measurement-to-simulation correlation

福利待遇

This is an opportunity to work on complex, high-performance compute platforms while partnering with experienced technical leaders, ODMs, and interconnect vendors. You will play a key role in defining, measuring, validating, and optimizing next-generation system-level I/O performance.

USA Benefits In addition to a competitive salary, Graphcore offers flexible working and a comprehensive benefits package designed to support your health, wellbeing and financial future. Our benefits include medical, dental and vision coverage, Flexible Spending Accounts (FSAs), Health Savings Accounts (HSAs), disability and life insurance, a 401(k) retirement plan, commuter benefits, wellness services and an Employee Assistance Programme (EAP). We welcome people of different backgrounds and experiences; we're committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

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