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资深物理设计工程师 - 班加罗尔,多个职位空缺

机器翻译
查看雇主原标题Senior Physical Design Engineer - Bengaluru, Multiple Vacancies

Graphcore · Bengaluru, 印度

职位信息来自雇主公开的招聘页面。申请前请务必在雇主官网核实详情。

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发现指数 52/100,仅依据与该职位一起存储的证据计算。

52/100 发现指数
  • 新的雇主官方职位
  • 稀有职位匹配

分数构成

  • 时效性 (随职位发布时间变化)+18
  • 雇主官方来源+15
  • 稀有职位+11
  • 公司来源健康度+8

该职位未包含:已披露薪资、远程职位、提及签证担保、提及搬迁、未出现在监控的职位板上。

这些理由来自雇主自己的职位描述与我们核实过的来源检查结果。除了已存储的信号之外,我们不做任何推测。

职位描述

英文原文

该职位由雇主以英文发布,暂无中文版本,下面完整显示英文原文。 查看官方职位页面.

职位描述

Silicon Physical Design Engineer

Multiple roles across different levels

Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption.

As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing.

The physical design team sits within the wider silicon design team which includes RTL, verification and DFT. Our work also involves strong links with architecture, packaging and product engineering. We are responsible for working with those teams to create high-quality RTL and building the final chip layout (e.g. GDSII) ensuring a signoff-quality design is delivered to the Foundry (e.g. TSMC).

We are looking to hire high-quality silicon physical design engineers to join our team. The successful candidate will support the team with achieving our goals and creating the right engineering solutions. We are a collaborative team and good communication is essential, as is the ability to adapt and learn. For the successful candidate we offer an open, honest and collaborative environment working on leading-edge designs at the most advanced nodes. Our engineers are not siloed, and they are trusted and encouraged to ta ke ownership of their designs and problem solutions. You will be part of a team that looks for improvements to everything we do: our designs, our flows, our methodologies, our infrastructure.

岗位职责

• Applicants will be expected to contribute technically to the development of Graphcore's next generation of AI superchips, focusing on achieving robust, high-performance and power-efficient designs in leading-edge process technologies while meeting ambitious development schedules

• Contributions are expected to span multiple areas and involve: • using state-of-the-art EDA tools and in-house Graphcore flows to deliver final designs that are of sign-off quality

• enhancing existing flows and in-house tools/APIs to support new features and/or methodologies

• analysis and/or debugging of complex engineering problems leading to workable solutions

• developing an understanding of emerging technical issues and applying that knowledge to optimise in-house flows and methodologies

• Candidates will be expected to work closely both with other teams within Graphcore and with 3rd party support engineers/contractors, ensuring good communication between all parties, and to contribute meaningfully to the overall efficiency and success of the Physical Team

任职要求

• A Degree in Electronic/Electrical Engineering, Computer Science or related subject with 3+ years of Industry experience

• Be highly motivated, a self-starter, and a team player

• Excellent problem-solving skills for debugging issues seen and finding root causes

• Ability to program/script (required to solve design issues, typically in Tcl and Python)

• A good breadth of experience with physical design flows including: • Floorplanning/Budgeting

• Synthesis

• Place and Route

• Clock CTS

• Logical Equivalence

• Timing Analysis

• Physical Verification (DRC/LVS/ERC)

Desirable skills:

• In depth expertise in one or more aspects of physical design flows

• Structuring of builds to maximise PPA

• Silicon transistor knowledge including std cell libraries and/or memories

• 2D and 3D design (CoWoS, UCIe etc.)

• High speed, high power and/or full reticle chip design

• Ethernet, PCIe, LPDDR, HBM interfaces

• Power integrity and optimization

• 2nm or 3nm technologies

• Chip finishing (pad rings, chip level LVS/DRC/ERC)

• Design for test

• Team management

• Project Planning

In addition to a competitive salary, Graphcore offers a competitive benefits package. We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

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