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逻辑设计工程师

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查看雇主原标题Logical Design Engineer

Graphcore · Bristol, UK; Cambridge, UK · salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to

职位信息来自雇主公开的招聘页面。申请前请务必在雇主官网核实详情。

为什么值得关注?

发现指数 52/100,仅依据与该职位一起存储的证据计算。

52/100 发现指数
  • 新的雇主官方职位
  • 稀有职位匹配

分数构成

  • 时效性 (随职位发布时间变化)+18
  • 雇主官方来源+15
  • 稀有职位+11
  • 公司来源健康度+8

该职位未包含:已披露薪资、远程职位、提及签证担保、提及搬迁、未出现在监控的职位板上。

这些理由来自雇主自己的职位描述与我们核实过的来源检查结果。除了已存储的信号之外,我们不做任何推测。

职位描述

英文原文

该职位由雇主以英文发布,暂无中文版本,下面完整显示英文原文。 查看官方职位页面.

职位描述

About Graphcore

At Graphcore, we’re building the future of AI compute.

We’re a team of semiconductor, software and AI experts, with deep experience in creating the complete AI compute stack - from silicon and software to infrastructure at datacenter scale.

As part of the SoftBank Group, backed by significant long-term investment, we are delivering key technology into the fast-growing SoftBank AI ecosystem.

To meet the vast and exciting AI opportunity, Graphcore is expanding its teams around the world.

We are bringing together the brightest minds to solve the toughest problems, in a place where everyone has the opportunity to make an impact on the company, our products and the future of artificial intelligence.

Job Summary

Working within the Logical Design team, the Silicon Logical Design Engineer is responsible for a wide range of logical design tasks which require working closely with other engineers within the Silicon department. This person is responsible for helping the team deliver high quality micro-architecture specifications and RTL for Graphcore chips, and assisting the rest of the Silicon teams to ensure we can meet the company objectives for silicon delivery.

岗位职责

• Integrate IP and subsystems into top-level SoC designs

• Develop and maintain build and configuration environments

• Perform synthesis, linting, CDC/RDC, and timing checks at the SoC level

• Support verification and physical design teams through clean interface hand-offs

• Debug and resolve integration-related issues across multiple hierarchies

• Contribute to the continuous improvement of integration flows and automation

• Producing high quality microarchitecture and other documentation

• Ensure good communication between sites to maintain consistent working practices

任职要求

• Degree in Computer Science, Engineering or a related subject

• Digital design experience in a relevant industry

• Be highly motivated, a self-starter, and a team player

• Ability to work across teams and finding solutions to problems

• Ability to solve design issues through programming, e.g. Python, Tcl

• Strong competency in SystemVerilog or VHDL

• Knowledge of digital design flows

• Capable of managing time and priorities

Desirable:

• Processor design

• Application specific blocks

• High-speed serial interfaces

• Complex third-party IP integration

• Arithmetic pipeline design

• Floating-point design

• Design for test

• Synthesis

• Timing Analysis

• Logical Equivalence

• Project Planning

• Power Integrity

• Silicon transistor knowledge

福利待遇

In addition to a competitive salary, Graphcore offers flexible working, a generous annual leave policy, private medical insurance and health cash plan, a dental plan, pension (matched up to 5%), life assurance and income protection. We have a generous parental leave policy and an employee assistance programme (which includes health, mental wellbeing, and bereavement support). We offer a range of healthy food and snacks at our central Bristol office and have our own barista bar! We welcome people of different backgrounds and experiences; we’re committed to building an inclusive work environment that makes Graphcore a great home for everyone. We offer an equal opportunity process and understand that there are visible and invisible differences in all of us. We can provide a flexible approach to interview and encourage you to chat to us if you require any reasonable adjustments.

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